S2ADC: A 12-bit, 1.25-MS/s Secure SAR ADC With Power Side-Channel Attack Resistance-Reference-Cited by-同舟云学术

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S2ADC: A 12-bit, 1.25-MS/s Secure SAR ADC With Power Side-Channel Attack Resistance

Published:2021-03 Issue:3 Volume:56 Page:844-854
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Jeong Taehoon^ORCID,Chandrakasan Anantha P.,Lee Hae-Seung

Funder

Analog Devices Inc

Korea Foundation for Advanced Studies

MIT Center for Integrated Circuits and Systems

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/9361453/09222207.pdf?arnumber=9222207

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Randomization Approaches for Secure SAR ADC Design Resilient Against Power Side-Channel Attacks;2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST);2024-05-06

2. Effect of reconstruction error in subtractive dither structure;Digital Signal Processing;2024-04

3. Implementing Privacy Homomorphism with Random Encoding and Computation Controlled by a Remote Secure Server;ACM Transactions on Embedded Computing Systems;2024-03-08

4. RI-SAR: Randomized Input SAR ADC Resilient to Power Side Channel Attacks;2023 IEEE Physical Assurance and Inspection of Electronics (PAINE);2023-10-24

5. An Analog Side-Channel Attack on a High-Speed Asynchronous SAR ADC Using Dual Neural Network Technique;IEICE Transactions on Electronics;2023-10-01

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