A Configurable Successive-Cancellation List Polar Decoder Using Split-Tree Architecture

Author:

Tao YaoyuORCID,Cho Sung-GunORCID,Zhang ZhengyaORCID

Funder

Intel

NSF

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 21 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. High-Throughput and Hardware-Efficient ASIC-Chip Fabrication of Reconfigurable LDPC/Polar Decoder for mMTC and URLLC 5G-NR Applications;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-09

2. A Low-Latency and High-Performance SCL Decoder with Frame-Interleaving;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

3. 2.8 A 21.9ns 15.7 Gbps/mm² (128,15) BOSS FEC Decoder for 5G/6G URLLC Applications;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18

4. High-Throughput and Flexible Belief Propagation List Decoder for Polar Codes;IEEE Transactions on Signal Processing;2024

5. Demo: Universal Soft-Detection Decoder with Ultra-Low Energy Consumption Using ORBGRAND;2023 IEEE 24th International Symposium on a World of Wireless, Mobile and Multimedia Networks (WoWMoM);2023-06

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