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HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-Point and Active Bit-Precision Searching

  • Published:2021-09 Issue:9 Volume:56 Page:2858-2869
  • ISSN:0018-9200
  • Container-title:IEEE Journal of Solid-State Circuits
  • language:
  • Short-container-title:IEEE J. Solid-State Circuits

Author:

Han DonghyeonORCID,Im DongseokORCID,Park GwangtaeORCID,Kim YoungwooORCID,Song SeokchanORCID,Lee JuhyoungORCID,Yoo Hoi-JunORCID

Funder

Institute for Information and Communications Technology Promotion (IITP) Grant

Korea Government (MSIP)

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 40 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Energy and Bandwidth Efficient Sparse Programmable Dataflow Accelerator;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-09

2. A Dynamic Execution Neural Network Processor for Fine-Grained Mixed-Precision Model Training Based on Online Quantization Sensitivity Analysis;IEEE Journal of Solid-State Circuits;2024-09

3. DQ-STP: An Efficient Sparse On-Device Training Processor Based on Low-Rank Decomposition and Quantization for DNN;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-04

4. CAMEL: Co-Designing AI Models and eDRAMs for Efficient On-Device Learning;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02

5. LUTein: Dense-Sparse Bit-Slice Architecture With Radix-4 LUT-Based Slice-Tensor Processing Units;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02
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