On a Moreau Envelope Wirelength Model for Analytical Global Placement

Author:

Liao Peiyu1,Liu Hongduo2,Lin Yibo1,Yu Bei2,Wong Martin2

Affiliation:

1. Peking University,Beijing,China

2. The Chinese University of Hong Kong,Hong Kong,China

Publisher

IEEE

Reference38 articles.

1. Analytical placement

2. elfPlace: Electrostatics-based Placement for Large-Scale Heterogeneous FPGAs

3. Progress and Challenges in VLSI Placement Research

4. DREAMPlace 3.0

5. Non-linear optimization system and method for wire length and delay optimization for an automatic electric circuit placer;naylor;US Patent,2001

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1. Differentiable Rectilinear Steiner Trees for Analytical Placement;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10

2. Invited Paper: Accelerating Routability and Timing Optimization with Open-Source AI4EDA Dataset CircuitNet and Heterogeneous Platforms;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

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