PUFFER: A Routability-Driven Placement Framework via Cell Padding with Multiple Features and Strategy Exploration-Reference-Cited by-同舟云学术

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PUFFER: A Routability-Driven Placement Framework via Cell Padding with Multiple Features and Strategy Exploration

Published:2023-07-09 Issue: Volume: Page:
ISSN:
Container-title:2023 60th ACM/IEEE Design Automation Conference (DAC)
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Author:

Cai Zhijie¹,Zou Peng¹,Wu Zhengtao²,Tong Xingyu¹,Yu Jun¹,Chen Jianli¹,Chang Yao-Wen³

Affiliation:

1. Fudan University,State Key Lab of ASIC & System,Shanghai,China,200433

2. Shanghai LEDA Technology Co., Ltd,Shanghai,China,201203

3. National Taiwan University,Graduate Institute of Electronics Engineering,Taipei,Taiwan,10617

Funder

Research and Development

AnaGlobe

Delta

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10247654/10247655/10247681.pdf?arnumber=10247681

Reference20 articles.

1. Routability-driven Global Placer Target on Removing Global and Local Congestion for VLSI Designs

2. NTUplace4h: A Novel Routability-Driven Placement Algorithm for Hierarchical Mixed-Size Circuit Designs

3. TSV-aware analytical placement for 3D IC designs

4. ePlace

5. Abacus

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Implement a PnR Flow to Boost the Pin Density in Block Level Chip Design;2024 IEEE International Conference on Information Technology, Electronics and Intelligent Communication Systems (ICITEICS);2024-06-28

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