cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis-Reference-Cited by-同舟云学术

cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis

Published:2023-07-09 Issue: Volume: Page:
ISSN:
Container-title:2023 60th ACM/IEEE Design Automation Conference (DAC)
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Author:

Zhao Aidong¹,Wang Xianan²,Lin Zixiao³,Bi Zhaori¹,Li Xudong⁴,Yan Changhao¹,Yang Fan¹,Shang Li⁵,Zhou Dian²,Zeng Xuan¹

Affiliation:

1. Fudan University,State Key Laboratory of Integrated Chips and Systems,Microelectronics Department,Shanghai,China

2. University of Texas,Department of Electrical Engineering,Dallas,USA

3. University of California,Department of Electrical and Computer Engineering,San Diego,USA

4. Fudan University,School of Data Science,Shanghai,China

5. Fudan University,School of Computer Science,Shanghai,China

Funder

National Natural Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10247654/10247655/10247994.pdf?arnumber=10247994

Reference23 articles.

1. Computational Geometry

2. Monte Carlo Tree Search in Continuous Spaces Using Voronoi Optimistic Optimization with Regret Bounds

3. The BOBYQA algorithm for bound constrained optimization without derivatives;powell;Technical Report Department of Applied Mathematics and Theoretical Physics,2009

4. Taking the Human Out of the Loop: A Review of Bayesian Optimization

5. Bandit Based Monte-Carlo Planning

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