Arithmetic logic units with high error detection rates to counteract fault attacks
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5754459/5762992/05763261.pdf?arnumber=5763261
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Fault Attacks on Access Control in Processors: Threat, Formal Analysis and Microarchitectural Mitigation;IEEE Access;2023
2. In-depth Analysis of the Effects of Electromagnetic Fault Injection Attack on a 32-bit MCU;2022 IEEE 35th International System-on-Chip Conference (SOCC);2022-09-05
3. Protecting Indirect Branches Against Fault Attacks Using ARM Pointer Authentication;2021 IEEE International Symposium on Hardware Oriented Security and Trust (HOST);2021-12-12
4. SecWalk: Protecting Page Table Walks Against Fault Attacks;2021 IEEE International Symposium on Hardware Oriented Security and Trust (HOST);2021-12-12
5. A novel self-checking carry lookahead adder with multiple error detection/correction;Microprocessors and Microsystems;2014-11
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