Impact of CnRx Structure on Soft Error Rates of Flip-Flop Designs at 22-nm FD SOI Node-Reference-Cited by-同舟云学术

Impact of CnRx Structure on Soft Error Rates of Flip-Flop Designs at 22-nm FD SOI Node

Published:2023-08 Issue:8 Volume:70 Page:1768-1774
ISSN:0018-9499
Container-title:IEEE Transactions on Nuclear Science
language:
Short-container-title:IEEE Trans. Nucl. Sci.

Author:

Elash Christopher J.¹^ORCID,Li Zongru¹^ORCID,Jin Chen¹,Chen Li¹^ORCID,Wen Shi-Jie²,Fung Rita²^ORCID,Xing Jiesi¹,Shi Shuting¹,Yang Zhi Wu¹^ORCID,Bhuva Bharat L.³^ORCID

Affiliation:

1. Department of Electrical and Computer Engineering, University of Saskatchewan, Saskatoon, Canada

2. Cisco Systems, San Jose, CA, USA

3. Department of Electrical and Computer Engineering, Vanderbilt University, Nashville, TN, USA

Funder

Natural Sciences and Engineering Research Council of Canada

Cisco Systems

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Nuclear Energy and Engineering,Nuclear and High Energy Physics

Link

http://xplorestaging.ieee.org/ielx7/23/10221199/10090239.pdf?arnumber=10090239

Reference16 articles.

1. Single-event effects in advanced CMOS technologies — Analysis and mitigation

2. Utilizing device stacking for area efficient hardened SOI flip-flop designs

3. Revisited parasitic bipolar effect in FDSOI MOSFETs: mechanism, gain extraction and circuit applications

4. Impact of strained-Si PMOS transistors on SRAM soft error rates

5. Continuous RX standard cell placement support in ICC for GLOBALFOUNDRIES 20 nm & below technologies;prakash;Proc SNUG,2014

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. SEU Performance of RHBD Flip-Flops Using Guard Gates at 22-nm FDSOI Technology Node;IEEE Transactions on Nuclear Science;2023-08