TID Effect of MOSFETs in SOI BCD Process and Its Hardening Technique-Reference-Cited by-同舟云学术

TID Effect of MOSFETs in SOI BCD Process and Its Hardening Technique

Published:2023-08 Issue:8 Volume:70 Page:1995-2001
ISSN:0018-9499
Container-title:IEEE Transactions on Nuclear Science
language:
Short-container-title:IEEE Trans. Nucl. Sci.

Author:

Wang Shiping¹^ORCID,Li Xiaojing¹^ORCID,Cai Xiaowu¹,Li Duoli¹,Jin Meichen¹,Lu Peng¹,Zhu Huiping¹,Zeng Chuanbin¹^ORCID,Tang Yun¹^ORCID,Xia Ruirui¹,Wang Lei¹,Li Bo¹^ORCID

Affiliation:

1. Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China

Funder

National Natural Science Foundation of China

Innovation Center of Radiation Application

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Nuclear Energy and Engineering,Nuclear and High Energy Physics

Link

http://xplorestaging.ieee.org/ielx7/23/10221199/10138926.pdf?arnumber=10138926

Reference22 articles.

1. Enhanced TID Susceptibility in Sub-100 nm Bulk CMOS I/O Transistors and Circuits

2. Dummy Gate-Assisted n-MOSFET Layout for a Radiation-Tolerant Integrated Circuit

3. Comprehensive Study on the Total Dose Effects in a 180-nm CMOS Technology

4. Total ionizing dose effects in shallow trench isolation oxides

5. Characterization of enclosed layout transistors for analog applications on a 130 nm technology;platcheck;Proc Symp Integrated Circuits and Systems Design (SBCCI),2020

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