A 13.5-to-28.8GHz 72.3%-Locking Range Multi-Phase Injection-Locked Frequency Tripler with Improved Output Power and Wideband Subharmonic-Spur Rejection in 28nm CMOS

Author:

Fan Chao1,Zhao Ya1,Yanlong 1,Zhang 1,Yin Jun2,Mak Pui-In2,Guohe 1,Zhang 1,Geng Li1

Affiliation:

1. Xi’an Jiaotong University,China

2. University of Macau,China

Publisher

IEEE

Reference6 articles.

1. A Mix-Mode Injection Frequency-Locked Loop for Self-Calibration of Injection Locking Range and Phase Noise in 0.13?m CMOS;shin;ISSCC,2016

2. A 4-to-11GHz Injection-Locked Quarter-Rate Clocking for an Adaptive 153fJ/b Optical Receiver in 28nm FDSOI CMOS;raj;ISSCC,2015

3. 19.2 A PVT-robust −39dBc 1kHz-to-100MHz integrated-phase-noise 29GHz injection-locked frequency multiplier with a 600µW frequency-tracking loop using the averages of phase deviations for mm-band 5G transceivers

4. A 25.8GHz Integer-N PLL with Time-Amplifying Phase-Frequency Detector Achieving 60fsrms Jitter, -252.8dB FoM _J, and Robust Lock Acquisition Performance;geng;ISSCC,2022

5. A 22.8-to-43.2 GHz Tuning-Less InjectionLocked Frequency Tripler Using Injection-Current Boosting with 76.4 Locking Range for Multiband 5G Applications;zhang;ISSCC,2018

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