A 3.46 Gb/s (9141,8224) LDPC-based ECC scheme and on-line channel estimation for solid-state drive applications

Author:

Ho Kin-Chu,Chen Chih-Lung,Liao Yen-Chin,Chang Hsie-Chia,Lee Chen-Yi

Publisher

IEEE

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A MATE-GDBF Algorithm for Irregular Punctured LDPC Codes and Its Decoder Implementation;2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2023-11-19

2. UP-GDBF: A 19.3 Gbps Error Floor Free 4KB LDPC Decoder for NAND Flash Applications;IEEE Open Journal of Circuits and Systems;2022

3. Energy-Efficient Symmetric BC-BCH Decoder Architecture for Mobile Storages;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-11

4. A Probabilistic Parallel Bit-Flipping Decoder for Low-Density Parity-Check Codes;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-01

5. Polar-coded forward error correction for MLC NAND flash memory;Science China Information Sciences;2018-08-21

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