Efficient hardware implementation of a new pseudo-random bit sequence generator-Reference-Cited by-同舟云学术

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Efficient hardware implementation of a new pseudo-random bit sequence generator

Published:2009-05 Issue: Volume: Page:
ISSN:
Container-title:2009 IEEE International Symposium on Circuits and Systems
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Author:

Katti Raj S.,Srinivasan Sudarshan K.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5076158/5117665/05118025.pdf?arnumber=5118025

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