Analysis of limit cycles in a PI digitally controlled buck converter-Reference-Cited by-同舟云学术

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Analysis of limit cycles in a PI digitally controlled buck converter

Published:2012-05 Issue: Volume: Page:
ISSN:
Container-title:2012 IEEE International Symposium on Circuits and Systems
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Author:

Bradley Mark,Alarcon Eduard,Feely Orla

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6257548/6270389/06272110.pdf?arnumber=6272110

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Limit-Cycle-Free Digitally Controlled DC–DC Converters Based on Dyadic Digital PWM;IEEE Transactions on Power Electronics;2020-10

2. Loadable Kessels Counter;2018 24th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC);2018-05

3. Saturation Generated Oscillations in Voltage-Mode Digital Control of DC–DC Converters;IEEE Transactions on Power Electronics;2016-06

4. References;Digital Control of High-Frequency Switched-Mode Power Converters;2015-07-14

5. Digital Control of High-Frequency Switched-Mode Power Converters;2015-06-22

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