1. Low-Additive Phase Noise Low-Power Static Frequency Dividers;2024 IEEE Radio and Wireless Symposium (RWS);2024-01-21
2. A 40-45 GHz Frequency Divider Employing InP HBT;2023 3rd International Conference on Electronic Information Engineering and Computer Communication (EIECC);2023-12-22
3. A 7.6–12.3 GHz wide‐band PLL with an ultra low reference spur −81.1 dBc in 0.13 μm CMOS technology;International Journal of Circuit Theory and Applications;2023-03-21
4. A Broadband and High Speed CML Divider with Inductor Peaking in 40-nm SMIC;2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT);2022-10-25
5. On the VCO/Frequency Divider Interface in Cryogenic CMOS PLL for Quantum Computing Applications;Electronics;2021-10-01