Author:
Kishine Keiji,Inoue Hiroshi,Inaba Hiromi,Nakamura Makoto,Tsuchiya Akira,Onodera Hidetoshi,Katsurai Hiroaki
Cited by
3 articles.
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1. A 50 Gb/s Low-Voltage Burst-Mode CDR based on Dual-Edge Injection-Locked Oscillator;2023 IEEE 11th Asia-Pacific Conference on Antennas and Propagation (APCAP);2023-11-22
2. 28 Gbaud PAM-4 Burst-Mode CDR With Reconfigurable Sampling Scheme;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-05
3. FPGA-Based Binary Labeling Signal Transmission System;JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE;2019-06-30