A new low-voltage charge pump circuit for PLL-Reference-Cited by-同舟云学术

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A new low-voltage charge pump circuit for PLL

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Container-title:2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)
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Author:

Chang R.C.,Lung-Chih Kuo

Publisher

Presses Polytech. Univ. Romandes

Link

http://xplorestaging.ieee.org/ielx5/6910/18623/00857586.pdf?arnumber=857586

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Self-cascode and self-biased Dickson charge pump for fast locking wide lock range PLL with reduced phase noise;Engineering Research Express;2024-04-25

2. Fast locking adaptive PLL using Dual-Edge Phase-Frequency Detector;Microelectronics Journal;2015-12

3. A low jitter phase-locked loop based on self-biased techniques;IEICE Electronics Express;2015

4. A DLL-Supported, Low Phase Noise Fractional-N PLL With a Wideband VCO and a Highly Linear Frequency Ramp Generator for FMCW Radars;IEEE Transactions on Circuits and Systems I: Regular Papers;2013-12

5. A 1V CMOS programmable accurate charge pump with wide output voltage range;Microelectronics Journal;2011-09

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