A 32-channel MCU-based feature extraction and classification for scalable on-node spike sorting-Reference-Cited by-同舟云学术

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A 32-channel MCU-based feature extraction and classification for scalable on-node spike sorting

Published:2016-05 Issue: Volume: Page:
ISSN:
Container-title:2016 IEEE International Symposium on Circuits and Systems (ISCAS)
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Author:

Barsakcioglu Deren Y.,Constandinou Timothy G.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7515073/7527154/07527489.pdf?arnumber=7527489

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Toward Ultra-large Scale Neural Spike Sorting with Distributed Sorting Channels and Unsupervised Training;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28

2. Algorithm and hardware considerations for real-time neural signal on-implant processing;Journal of Neural Engineering;2022-02-01

3. Adaptive spike detection and hardware optimization towards autonomous, high-channel-count BMIs;Journal of Neuroscience Methods;2021-04

4. Enhanced total neurite outgrowth and secondary branching in dorsal root ganglion neurons elicited by low intensity pulsed ultrasound;Journal of Neural Engineering;2018-05-16

5. Compact standalone platform for neural recording with real-time spike sorting and data logging;Journal of Neural Engineering;2018-05-16

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