Comparison of 130 nm technology 6T and 8T SRAM cell designs for Near-Threshold operation

Author:

Kutila Mika,Paasio Ari,Lehtonen Teijo

Publisher

IEEE

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design and Performance Benchmarking of 8T SRAM Cell using Dynamic Feedback Control;2023 IEEE Industrial Electronics and Applications Conference (IEACon);2023-11-06

2. Parametric Faults in Computing-in-Memory Applications of a 4kb Read-Decoupled 8T SRAM Array in 40nm CMOS;2023 IEEE International Test Conference in Asia (ITC-Asia);2023-09-12

3. Analysis of Power, Delay and SNM of 6T & 8T SRAM Cells;2021 5th International Conference on Electronics, Communication and Aerospace Technology (ICECA);2021-12-02

4. A Low-Voltage 6T Dual-Port Configured SRAM with Wordline Boost in 28 nm FD-SOI;ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC);2021-09-13

5. Ultra-Low Power and High-Throughput SRAM Design to Enhance AI Computing Ability in Autonomous Vehicles;Electronics;2021-01-22

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