3D Chip Stacking Technology with Low-Volume Lead-Free Interconnections-Reference-Cited by-同舟云学术

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3D Chip Stacking Technology with Low-Volume Lead-Free Interconnections

Published:2007-05 Issue: Volume: Page:
ISSN:
Container-title:2007 Proceedings 57th Electronic Components and Technology Conference
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Author:

Sakuma K,Andry P.S.,Dang B.,Maria J.,Tsang C.K.,Patel C.,Wright S.L.,Webb B.,Sprogis E.,Kang S.K.,Polastre R.,Horton R.,Knickerbocker J.U.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4249837/4249838/04249948.pdf?arnumber=4249948

Cited by 46 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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