High-Speed Ternary CMOS Inverter by Monolithic Integration of NbO2 Threshold Switch with MOSFET

Author:

Heo Seongjae1,Lee Junjong1,Lee Sangmin1,Lee Seungwoo1,Lee Chuljun1,Baek Rock-Hyun1,Hwang Hyunsang1

Affiliation:

1. Pohang University of Science and Technology (POSTECH),Department of Materials Science and Engineering,Pohang,Korea

Funder

National Research Foundation of Korea (NRF)

Publisher

IEEE

Reference16 articles.

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Implementation of High-Speed Multi-Trit Adders for Balanced and Unbalanced Ternary Logic;2024 13th International Conference on Communications, Circuits and Systems (ICCCAS);2024-05-10

2. Investigation of Temperature and Channel Dimension Effects on CMOS Circuit Performance;East European Journal of Physics;2024-03-05

3. Vertically Integrated CMOS Ternary Logic Device with Low Static Power Consumption and High Packing Density;ACS Applied Materials & Interfaces;2023-10-25

4. Novel High-Speed Ternary Logic Using Step-Shaped Threshold Switch;IEEE Electron Device Letters;2023-03

5. Hybrid CMOS-PCM Ternary Logic for Digital Circuit Applications;IEEE Transactions on Nanotechnology;2023

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