Electrostatic Integrity in Negative-Capacitance FETs – A Subthreshold Modeling Approach
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/8971803/8993428/08993444.pdf?arnumber=8993444
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. On the Existence of Negative Capacitance: Examining Ferroelectric-Dielectric Stack Experiments Using the NLS and LK Models;IEEE Transactions on Electron Devices;2023-07
2. Quasi-analytical model of surface potential and drain current for trigate negative capacitance FinFET: a superposition approach;Semiconductor Science and Technology;2022-07-07
3. S-Curve Engineering for ON-State Performance Using Anti-Ferroelectric/Ferroelectric Stack Negative-Capacitance FinFET;IEEE Transactions on Electron Devices;2021-09
4. Electric Field-Induced Permittivity Enhancement in Negative-Capacitance FET;IEEE Transactions on Electron Devices;2021-03
5. Mitigating DIBL and Short-Channel Effects for III-V FinFETs with Negative-Capacitance Effects;IEEE Journal of the Electron Devices Society;2021
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