Impact of Interface Trap Charge on Analog/RF parameters of Novel Heterogeneous Gate Dielectric Tri-Metal Gate FinFET
Author:
Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/9484856/9484857/09484911.pdf?arnumber=9484911
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2. Physical insights of interface traps and self-heating effect on electrical response of DMG FinFETs in overlap and underlap configurations: analog/RF perspective;Physica Scripta;2023-12-29
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5. Design and Compressive Analysis of Junctionless Multigate FinFET Towards Low Power and High Frequency Applications;Silicon;2021-11-08
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