Author:
Makar S.R.,McCluskey E.J.
Cited by
12 articles.
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1. Conventional Tests for Approximate Scan Logic;IEEE Design & Test;2024-06
2. Usable Circuits with Imperfect Scan Logic;2022 IEEE 31st Asian Test Symposium (ATS);2022-11
3. Test Sequences for Faults in the Scan Logic;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2022-10
4. Improved Pseudo-Random Fault Coverage Through Inversions: a Study on Test Point Architectures;Journal of Electronic Testing;2020-02
5. Scan-Chain Intra-Cell Aware Testing;IEEE Transactions on Emerging Topics in Computing;2018-04-01