Low-power, high-speed CMOS VLSI design-Reference-Cited by-同舟云学术

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Low-power, high-speed CMOS VLSI design

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Container-title:Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors
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Author:

Kuroda T.

Publisher

IEEE Comput. Soc

Link

http://xplorestaging.ieee.org/ielx5/8166/24311/01106787.pdf?arnumber=1106787

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Electrical control of magnetism by electric field and current-induced torques;Reviews of Modern Physics;2024-03-13

2. Microstructure Features and Mechanical Properties of Casted CoFeB Alloy Target;Coatings;2024-02-21

3. An Automated Static CMOS Schematic Generation Using MATLAB;2023 2nd International Conference for Innovation in Technology (INOCON);2023-03-03

4. SOT-MRAM-based Binary Neural Networks Demonstration for Single Character Recognition;SPIN;2022-02-11

5. Low-Leakage 3D Stacked Hybrid NEMFET-CMOS Dual Port Memory;IEEE Transactions on Emerging Topics in Computing;2018-04-01

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