Signal Integrity Analysis of Through-Silicon-Via (TSV) With Passive Equalizer to Separate Return Path and Mitigate the Inter-Symbol Interference (ISI) for Next Generation High Bandwidth Memory-Reference-Cited by-同舟云学术

Signal Integrity Analysis of Through-Silicon-Via (TSV) With Passive Equalizer to Separate Return Path and Mitigate the Inter-Symbol Interference (ISI) for Next Generation High Bandwidth Memory

Published:2023-12 Issue:12 Volume:13 Page:1973-1988
ISSN:2156-3950
Container-title:IEEE Transactions on Components, Packaging and Manufacturing Technology
language:
Short-container-title:IEEE Trans. Compon., Packag. Manufact. Technol.

Author:

Kim Hyunwoong¹^ORCID,Park Jongcheol²^ORCID,Lee Sanguk¹,Kim Jongwook³^ORCID,Ahn Seungyoung¹^ORCID

Affiliation:

1. Cho Chun Shik Graduate School of Mobility, Korea Advanced Institute of Science and Technology, Daejeon, South Korea

2. National NanoFab Convergence Technology, National NanoFab Center, Daejeon, South Korea

3. SK Hynix, Icheon, South Korea

Funder

National Research and Development Program through the National Research Foundation of Korea (NRF), funded by the Ministry of Science and ICT

Institute of Information and communications Technology Planning and Evaluation (IITP) through the Korea Government

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/5503870/10382162/10323374.pdf?arnumber=10323374

Reference29 articles.

1. Sharing power distribution networks for enhanced power integrity by using Through-Silicon-Via

2. A Stub Equalizer for Bidirectional and Single-Ended Channels in NAND Memory Storage Device Systems

3. Analysis and Mitigation of Effect of Plating Stub on Transmission Waveform and Eye Diagram

4. A 1.2V 64Gb 341GB/S HBM2 stacked DRAM with spiral point-to-point TSV structure and improved bank group data control