Comprehensive Investigation of In-Plane and Out-of-Plane Die Shift in Flexible Fan-Out Wafer-Level Packaging Using Polydimethylsiloxane
Author:
Affiliation:
1. Center for Heterogeneous Integration and Performance Scaling (UCLA CHIPS), University of California at Los Angeles, Los Angeles, CA, USA
Funder
Semiconductor Research Corporation
Army Research Laboratory
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/5503870/9953743/09893859.pdf?arnumber=9893859
Reference18 articles.
1. Die Shift Assessment of Reconstituted Wafer for Fan-Out Wafer-Level Packaging
2. Significant Die-Shift Reduction and μLED Integration Based on Die-First Fan-Out Wafer-Level Packaging for Flexible Hybrid Electronics
3. Young's Modulus, Shear Modulus, and Poisson's Ratio in Silicon and Germanium
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