A data-reuse architecture for gray-scale morphologic operations

Author:

Sheu M.-H.,Wang J.-F.,Chen J.-S.,Suen A.-N.,Jeang Y.-L.,Lee J.-Y.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Signal Processing

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. FPGA Implementation of Morphological Gradient Operation using Xilinx System Generator;2022 IEEE 2nd Mysore Sub Section International Conference (MysuruCon);2022-10-16

2. A Highly Flexible Architecture for Morphological Gradient Processing Implemented on FPGA;Arabian Journal for Science and Engineering;2019-09-24

3. FPGA-Based Parallel Implementation of Morphological Operators for 2D Gray-Level Images;Arabian Journal for Science and Engineering;2017-02-07

4. A systolic array architecture for morphological operators using arbitrary structuring elements;Proceedings of the International Conference on Advances in Information Communication Technology & Computing - AICTC '16;2016

5. Fast recursive grayscale morphology operators: from the algorithm to the pipeline architecture;Journal of Real-Time Image Processing;2010-07-31

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