Execution of Convolution Coding Method for FPGA in Industrial Automation using VERILOG HDL-Reference-Cited by-同舟云学术

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Execution of Convolution Coding Method for FPGA in Industrial Automation using VERILOG HDL

Published:2023-02-23 Issue: Volume: Page:
ISSN:
Container-title:2023 7th International Conference on Computing Methodologies and Communication (ICCMC)
language:
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Author:

Venusamy Kanagaraj¹,Kannadhasan S.²,Vimalesh A.¹,Chandramohan P¹,Shanmugam M.¹,Priyadarsini K.³

Affiliation:

1. Rajalakshmi Engineering College,Department of Mechatronics Engineering,Chennai,India

2. Study World College of Engineering Coimbatore,Department of Electronics and Communication Engineering,Chennai,India

3. School of Computing, SRM Institute of Science & Technology,Department of Data Science and Business Systems,Chennai,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10083318/10083503/10084251.pdf?arnumber=10084251

Reference15 articles.

1. Enhancement of Spectral Efficiency and Power Budget in WDN-PON Employing LDPC-Coded Probabilistic Shaping PAM8

2. A novel demodulation system for base band digital modulation signals based on the deep long short-term memory model

3. Enhanced Deep Learning Approach Based on the Deep Convolutional Encoder–Decoder Architecture for Electromagnetic Inverse Scattering Problems

4. Performance Monitoring for Live Systems with Soft FEC and Multilevel Modulation

5. Simulation and Performance Study of Quadrature Amplitude Modulation and Demodulation System

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