Scalable, Programmable and Dense: The HammerBlade Open-Source RISC-V Manycore

Author:

Jung Dai Cheol1,Ruttenberg Max1,Gao Paul1,Davidson Scott1,Petrisko Daniel1,Li Kangli1,Kamath Aditya K1,Cheng Lin2,Xie Shaolin1,Pan Peitian2,Zhao Zhongyuan2,Yue Zichao2,Veluri Bandhav1,Muralitharan Sripathi1,Sampson Adrian2,Lumsdaine Andrew1,Zhang Zhiru2,Batten Christopher2,Oskin Mark1,Richmond Dustin3,Taylor Michael Bedford1

Affiliation:

1. University of Washington

2. Cornell University

3. University of California,Santa Cruz

Publisher

IEEE

Reference63 articles.

1. RISC-V Bit-manipulation,2021

2. RISC-V GNU Compiler Toolchain,2023

3. Solderpad Hardware License,2023

4. Achieving predictable performance through better memory controller placement in many-core CMPs

5. Experiences using the RISC-V ecosystem to design an accelerator-centric SoC in TSMC 16nm;Ajayi

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