Statistical link analysis of high-speed memory I/O interfaces during simultaneous switching events-Reference-Cited by-同舟云学术

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Statistical link analysis of high-speed memory I/O interfaces during simultaneous switching events

Published:2008-10 Issue: Volume: Page:
ISSN:
Container-title:2008 IEEE-EPEP Electrical Performance of Electronic Packaging
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Author:

Ren Jihong,Oh Dan,Chang Sam,Lambrecht Frank

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4666059/4675858/04675867.pdf?arnumber=4675867

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Transfer Learning based High-Speed Link Transient Modeling Method;2024 IEEE Joint International Symposium on Electromagnetic Compatibility, Signal & Power Integrity: EMC Japan / Asia-Pacific International Symposium on Electromagnetic Compatibility (EMC Japan/APEMC Okinawa);2024-05-20

2. Deep Gated Recurrent Unit Network for High-Speed Links Modeling;2023 IEEE 7th International Symposium on Electromagnetic Compatibility (ISEMC);2023-10-20

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