Demonstration and Optimization of Multi-Fin Dual Spacer FinFET for Reliable Sub-THz Frequency Operation-Reference-Cited by-同舟云学术

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Demonstration and Optimization of Multi-Fin Dual Spacer FinFET for Reliable Sub-THz Frequency Operation

Published:2024-07-08 Issue: Volume: Page:25-29
ISSN:
Container-title:2024 IEEE 24th International Conference on Nanotechnology (NANO)
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Author:

Patel J.¹,Aggarwal N.¹,Bagga N.²,Kumar V.³,Dixit A.⁴,Kumar N.⁴,Georgiev V.⁴,Dasgupta S.¹

Affiliation:

1. Indian Institute of Technology,Roorkee,Uttarakhand,India,247667

2. School of Electrical Sciences, Indian Institute of Technology Bhubaneswar,Odisha,India

3. NIT - Uttarakhand,Department of Electronics Engineering,India

4. University of Glasgow,United Kingdom

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx8/10628446/10628545/10628608.pdf?arnumber=10628608

Reference11 articles.

1. Intel 22nm FinFET (22FFL) Process Technology for RF and mm Wave Applications and Circuit Design Optimization for FinFET Technology

2. Analysis of the Parasitic S/D Resistance in Multiple-Gate FETs

3. 14nm FinFET technology for analog and RF applications

4. The Impact of Fin Number on Device Performance and Reliability for Multi-Fin Tri-Gate n- and p-Type FinFET

5. High-Performance and Robust SRAM Cell Based on Asymmetric Dual-$k$ Spacer FinFETs

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