Author:
Conceicao Calebe,Moura Gisell,Pisoni Filipe,Reis Ricardo
Cited by
3 articles.
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1. Netlist Optimization by Gate Merging;2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC);2019-10
2. Transistor Count Reduction by Gate Merging;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-06
3. Strategies for Reducing Power Consumption and Increasing Reliability in IoT;IFIP Advances in Information and Communication Technology;2019