The Comparative Analysis of Single Error Bursts Decoders for Linear Codes
Author:
Affiliation:
1. Saint-Petersburg State University of Aerospace Instrumentation,Department of Infocommunication Systems and Technologies,Saint-Petersburg,Russia
Funder
Ministry of Science and Higher Education of the Russian Federation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10564567/10564568/10564623.pdf?arnumber=10564623
Reference13 articles.
1. Improving Burst Error Tolerance of LDPC-Centric Coding Systems in Read Channel
2. FPGA-based burst-error performance analysis and optimization of regular and irregular SD-LDPC codes for 50G-PON and beyond
3. Construction of Multiple-Burst-Correction Codes in Transform Domain and Its Relation to LDPC Codes
4. Cyclic Low Density Parity Check Codes With the Optimum Burst Error Correcting Capability
5. About the Joint Correcting of Error Bursts and Independent Errors Using LDPC Codes
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