A $2.81\mu \mathrm{W}$, Energy Efficient MFCC Feature Extractor for Keyword-Spotting in 65nm CMOS
Author:
Affiliation:
1. School of Electronics and Information Technology, Sun Yat-Sen University,Guangzhou,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10150427/10150444/10151378.pdf?arnumber=10151378
Reference9 articles.
1. A Configurable Accelerator for Keyword Spotting Based on Small-Footprint Temporal Efficient Neural Network
2. Precision Adaptive MFCC Based on R2SDF-FFT and Approximate Computing for Low-Power Speech Keywords Recognition
3. A Novel Memory-Based FFT Architecture for Real-Valued Signals Based on a Radix-2 Decimation-In-Frequency Algorithm
4. A 22nm, 10.8 μ W/15.1 μ W Dual Computing Modes High Power-Performance-Area Efficiency Domained Background Noise Aware Keyword- Spotting Processor
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