Test Scheduling for Multicore SoCs with Dynamic Voltage Scaling and Multiple Voltage Islands-Reference-Cited by-同舟云学术

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Test Scheduling for Multicore SoCs with Dynamic Voltage Scaling and Multiple Voltage Islands

Published:2011-11 Issue: Volume: Page:
ISSN:
Container-title:2011 Asian Test Symposium
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Author:

Kavousianos Xrysovalantis,Chakrabarty Krishnendu,Jain Arvind,Parekhji Rubin

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6114262/6114277/06114510.pdf?arnumber=6114510

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Modified Adaptive Differential Evolution Algorithm for Test Scheduling of Multi-Core SOC Based on DVS and MVI;2018 Eighth International Conference on Instrumentation & Measurement, Computer, Communication and Control (IMCCC);2018-07

2. Energy-efficient scheduling with reliability guarantee in embedded real-time systems;Sustainable Computing: Informatics and Systems;2018-06

3. IPRM: IP core resource multiplexing of core wrapper design for reducing test application time in DVFS-based multicore SoCs;Integration;2017-03

4. Test Structure with Variable Test Data Width of IP Cores for Multicore SoCs with DVS and Multiple Voltage Islands;2016 Sixth International Conference on Instrumentation & Measurement, Computer, Communication and Control (IMCCC);2016-07

5. Exploit Dynamic Voltage and Frequency Scaling for SoC Test Scheduling under Thermal Constraints;2014 IEEE 23rd Asian Test Symposium;2014-11

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