Towards Selective Cobalt Atomic Layer Deposition for Chip-to-Wafer 3D Heterogeneous Integration
Author:
Affiliation:
1. Georgia Institute of Technology,Department of Electrical & Computer Engineering
2. Wayne State University,Department of Chemistry
3. University of California,Department of Chemistry,San Diego
Funder
National Science Foundation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10195193/10195244/10195522.pdf?arnumber=10195522
Reference16 articles.
1. Cu–Cu Bonding Using Selective Cobalt Atomic Layer Deposition for 2.5-D/3-D Chip Integration Technologies
2. Development of low temperature CuCu bonding and hybrid bonding for three-dimensional integrated circuits (3D IC);hu;Evaluation of Variability using Schmitt Trigger on Full Adders Layout Microelectronics Reliability,2021
3. Compact Thermal Modeling Methodology for Active and Thermal Bumps in 3D Microelectronic Packages
4. “Zeppelin”: An SoC for Multichip Architectures
5. Scaling package interconnects below ? pitch with hybrid bonding;gao;Proc IEEE 68th Electron Compon Technol Conf (ECTC),2018
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