A Parameter Study for the Design Optimization to Relieve Pattern Stress of PCB under the Temperature Cycling Condition
Author:
Affiliation:
1. Samsung Electronics Memory Business,Product Quality Assurance Team,Hwaseong,South Korea
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9816066/9816372/09816410.pdf?arnumber=9816410
Reference9 articles.
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3. Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR)
4. The Effect of Voids on Thermal Reliability of BGA Lead Free Solder Joint and Reliability Detecting Standard;yu;Proc Thermal and Thermomechanical Phenomena in Electronics Systems (ITHERM) Packaging and Manufacturing Technology Society (CPMT) IEEE Components,2006
5. Effect of Reflow Number on Mechanical and Electrical Properties of Ball Grid Array (BGA) Solder Joints;koo;J Microelectron Packag Soc,2007
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