Comparison and application of different VHDL-based fault injection techniques

Author:

Gracia J.,Baraza J.C.,Gil D.,Gil P.J.

Publisher

IEEE Comput. Soc

Cited by 25 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Multi-Level Fault Injection Methodology Using UVM-SystemC;2023 IEEE East-West Design & Test Symposium (EWDTS);2023-09-22

2. Integrated Stateflow-based simulation modelling and testability evaluation for electronic built-in-test (BIT) systems;Reliability Engineering & System Safety;2020-10

3. Cross Layer Fault Simulations for Analyzing the Robustness of RTL Designs in Airborne Systems;2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS);2020-04

4. A Simulation-based Fault Injection Mechanism of Digital Circuit;The 5th International Conference on Advanced Computer Science Applications and Technologies (ACSAT 2017);2017-04-05

5. Modeling and Simulated Fault Injection for Time-Triggered Safety-Critical Embedded Systems;2014 IEEE 17th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing;2014-06

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