Self-Powered Implantable CMOS Photovoltaic Cell With 18.6% Efficiency
Author:
Affiliation:
1. James Watt School of Engineering, University of Glasgow, Glasgow, U.K
2. State Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China
Funder
EPSRC, U.K
European Union’s Horizon 2020 Hybrid Enhanced Regenerative Medicine Systems
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/10136238/10113846.pdf?arnumber=10113846
Reference19 articles.
1. Design Optimization of Photovoltaic Cell Stacking in a Triple-Well CMOS Process
2. High-Voltage Generation With Stacked Photodiodes in Standard CMOS Process
3. A Single-Chip Solar Energy Harvesting IC Using Integrated Photodiodes for Biomedical Implant Applications
4. Integrated Silicon PIN Photodiodes Using Deep N-Well in a Standard 0.18-$\mu$m CMOS Technology
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