BNN-Flip: Enhancing the Fault Tolerance and Security of Compute-in-Memory Enabled Binary Neural Network Accelerators
Author:
Affiliation:
1. Purdue University,West Lafayette,Indiana,USA
Funder
Semiconductor Research Corporation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10473777/10473787/10473947.pdf?arnumber=10473947
Reference26 articles.
1. XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks
2. XNOR-Net: ImageNet Classification Using Binary Convolutional Neural Networks
3. Parallelizing SRAM Arrays with Customized Bit-Cell for Binary Neural Networks
4. Design and optimization of FeFET-based crossbars for binary convolution neural networks
5. XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks
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