An Efficient 5-Transistor SRAM Cell Design using FNSBS-CNTFET for Improving Read and Write Stability
Author:
Affiliation:
1. JNTUA College of Engineering Anantapur,Department of ECE,Ananthapuramu,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9915554/9915796/09915838.pdf?arnumber=9915838
Reference15 articles.
1. Darlington based 8T CNTFET SRAM cells with low power and enhanced write stability;elangovan;Transactions on Electrical and Electronic Materials,2021
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5. A Technique to Reduce the Capacitor Size in Two Stage Miller Compensated Opamp.
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