In-Depth Timing Characterization of the Adiabatic Quantum-Flux-Parametron Logic Gate
Author:
Affiliation:
1. Department of Electrical and Computer Engineering, Yokohama National University, Yokohama, Japan
2. Institute of Advanced Sciences, Yokohama National University, Yokohama, Japan
Funder
Grant-in-Aid for Scientific Research
Japan Society for the Promotion of Science
VLSI Design and Education Center
University of Tokyo in collaboration with Cadence Design Systems, Inc
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx7/77/10438922/10388398.pdf?arnumber=10388398
Reference23 articles.
1. These transistor gates are just one carbon atom thick;Choi,2022
2. An adiabatic quantum flux parametron as an ultra-low-power logic device
3. Adiabatic Quantum-Flux-Parametron: A Tutorial Review
4. A Josephson integrated circuit simulator (JSIM) for superconductive electronics application;Fang,1989
5. JoSIM—Superconductor SPICE Simulator
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