Author:
Piazza F.,Uncini A.,Zenobi M.
Cited by
20 articles.
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2. Deep-BMNN: Implementing Sparse Binary Neural Networks in Memory-Based Reconfigurable Processor (MRP);2024 International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC);2024-07-02
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5. FPGA implementation and verification of efficient and reconfigurable CNN-LSTM accelerator design;Proceedings of the 2023 3rd Guangdong-Hong Kong-Macao Greater Bay Area Artificial Intelligence and Big Data Forum;2023-09-22