Analysis, Hardware Specification and Design of a Programmable Performance Monitoring Unit (PPMU) for RISC-V ECUs
Author:
Affiliation:
1. Huawei Research Centre,Pisa,Italy
2. Dep. Information Engineering,Pisa,Italy
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9820747/9820748/09821043.pdf?arnumber=9821043
Reference20 articles.
1. High-Integrity Performance Monitoring Units in Automotive Chips for Reliable Timing V&V
2. HERO: Heterogeneous Embedded Research Platform for Exploring RISC-V Manycore Accelerators on FPGA;kurth;CARRV'17,2017
3. OpenPiton
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