Over-100-Gb/s 1:2 Demultiplexer Based on InP HBT Technology-Reference-Cited by-同舟云学术

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Over-100-Gb/s 1:2 Demultiplexer Based on InP HBT Technology

Published:2007-11 Issue:11 Volume:42 Page:2594-2599
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Suzuki Yasuyuki,Mamada Masayuki,Yamazaki Zin

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/4362082/04362113.pdf?arnumber=4362113

Cited by 11 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. 40-Gb/s 0.7-V 2:1 MUX and 1:2 DEMUX with Transformer-Coupled Technique for SerDes Interface;IEEE Transactions on Circuits and Systems I: Regular Papers;2015-04

2. SiGe Clock and Data Recovery System Based on Injection-Locked Oscillator for 100 Gbit/s Serial Data Link;IEEE Journal of Solid-State Circuits;2014-09

3. High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2:1 Multiplexer and 1:2 Demultiplexer Modules Using 1-µm InP/InGaAs/InP Double Heterojunction Bipolar Transistors;IEICE Transactions on Electronics;2013

4. 12.5 Gbps 1:16 DEMUXIC with high speed synchronizing circuits;Journal of Semiconductors;2011-12

5. Green Optical Communications—Part I: Energy Limitations in Transport;IEEE Journal of Selected Topics in Quantum Electronics;2011-03

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