A 48-16-MHz CMOS SC decimation filter-Reference-Cited by-同舟云学术

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A 48-16-MHz CMOS SC decimation filter

Published:2002-10 Issue:10 Volume:37 Page:1282-1289
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:en
Short-container-title:IEEE J. Solid-State Circuits

Author:

Baruqui F.A.P.,Petraglia A.,Franca J.E.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/22227/01035942.pdf?arnumber=1035942

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Fully Differential CMOS Voltage Buffer for Continuous- and Discrete-Time Applications;Circuits, Systems, and Signal Processing;2010-11-13

2. Switched-capacitor decimation filter design using time-multiplexing and polyphase decomposition of transfer functions with low denominator orders;Microelectronics Journal;2009-12

3. A new approach for the design of CMOS voltage buffers for switched-capacitor and gm-C filters;2009 IEEE International Symposium on Circuits and Systems;2009-05

4. Efficient Decimation Filter Design for Lofargram Analysis in Passive Sonar Systems;IEEE Transactions on Instrumentation and Measurement;2006-02

5. Low-sensitivity IIR switched-capacitor decimation filters using delay lines with staggered T∕H stages;IEE Proceedings - Circuits, Devices and Systems;2006

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