A quadrature digital synthesizer/mixer architecture using fine/coarse coordinate rotation to achieve 14-b input, 15-b output, and 100-dBc SFDR
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx5/4/29672/01347316.pdf?arnumber=1347316
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Digital circuit design for a high-speed direct digital frequency synthesizer;2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC);2009-12
2. A direct digital frequency synthesizer with high-speed current-steering DAC;Journal of Semiconductors;2009-10
3. Digital Synthesizer/Mixer With Hybrid CORDIC–Multiplier Architecture: Error Analysis and Optimization;IEEE Transactions on Circuits and Systems I: Regular Papers;2009-02
4. A 630 MHz, 76 mW Direct Digital Frequency Synthesizer Using Enhanced ROM Compression Technique;IEEE Journal of Solid-State Circuits;2007-02
5. A 380 MHz Direct Digital Synthesizer/Mixer With Hybrid CORDIC Architecture in 0.25 $\mu{\hbox {m}}$ CMOS;IEEE Journal of Solid-State Circuits;2007-01
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