Analog Hardware Neural Networks using Logarithmic Four-Quadrant Multiple Circuits

Author:

Kawaguchi Masashi1,Ishii Naohiro2,Umeno Masayoshi3

Affiliation:

1. National Institute of Technology, Suzuka College,Department of Electrical & Electronic Engineering,Suzuka,Japan

2. Information Systems Architecture Course Advanced Institute of Industrial Technology,Tokyo,Japan

3. Chubu University,Department of Electronic Engineering,Kasugai,Japan

Publisher

IEEE

Reference19 articles.

1. Analog VLSI Layout Design and the Circuit Board Manufacturing of Advanced Image Processing for Artificial Vision Model

2. Dynamic Learning of Neural Network by Analog Electronic Circuits

3. Analog Learning Neural Network Using Multiple and Sample Hold Circuits

4. Representation Learning, “A Review and New Perspectives;yoshua;IEEE Trans Pattern Anal Mach Intell,2013

5. Analog neural circuit with switched capacitor and design of deep learning model;kawaguchi;3rd International Conference on Applied Computing and Information Technology and 2nd International Conference on Computational Science and Intelligence ACIT-CSI,0

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Analog Neural Network Model based on Improved Logarithmic Multipliers;2022 12th International Congress on Advanced Applied Informatics (IIAI-AAI);2022-07

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