A pure hardware k-SAT solver architecture for FPGA based on generic tree-search-Reference-Cited by-同舟云学术

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A pure hardware k-SAT solver architecture for FPGA based on generic tree-search

Published:2017-12 Issue: Volume: Page:
ISSN:
Container-title:2017 29th International Conference on Microelectronics (ICM)
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Author:

Bousmar Khadija,Monteiro Fabrice,Habbas Zineb,Dellagi Sofiene,Dandache Abbas

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8255703/8268805/08268894.pdf?arnumber=8268894

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Implications of Deductive Verification on Research Quality;The Logic of Software. A Tasting Menu of Formal Methods;2022

2. SAT-Hard: A Learning-Based Hardware SAT-Solver;2019 22nd Euromicro Conference on Digital System Design (DSD);2019-08

3. Origins of Evolutionary Novelty;Epigenetic Principles of Evolution;2019

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