Author:
Borch E.,Tune E.,Manne S.,Emer J.
Cited by
6 articles.
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1. Memento: An Adaptive, Compiler-Assisted Register File Cache for GPUs;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29
2. HAIR: Halving the Area of the Integer Register File with Odd/Even Banking;ACM Transactions on Architecture and Code Optimization;2022-09-16
3. CryoWire: wire-driven microarchitecture designs for cryogenic computing;Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems;2022-02-22
4. RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor;High Performance Embedded Architectures and Compilers;2010
5. Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput?;Architecture of Computing Systems - ARCS 2006;2006